Chapter 13: Introduction to Interrupts

📚 CMPE1250: Introduction to Interrupts

🎯 Learning Objectives

By the end of this lesson, students will be able to:

  • Describe the purpose and benefits of using interrupts in embedded systems.
  • Configure and enable USART interrupts on the STM32G031.
  • Write and analyze an interrupt service routine (ISR) for USART reception.
  • Differentiate between polling and interrupt-driven communication

1️⃣ What Are Interrupts?

An interrupt is a hardware-triggered event that causes the microcontroller to temporarily halt its current execution and jump to a predefined routine called an Interrupt Service Routine (ISR). This mechanism allows the system to respond immediately to critical events without constantly polling for changes.

Interrupts can be triggered by:

  • Internal peripherals (e.g., timers, USART, ADC)
  • External sources (e.g., button presses, sensor signals)

2️⃣ Why Use Interrupts?

Interrupts are essential for building responsive and efficient embedded systems. They allow the MCU to:

  • Coordinate I/O tasks without wasting CPU cycles on polling.
  • Respond to time-critical events like incoming serial data or sensor thresholds.
  • Handle errors by reacting to fault flags or system exceptions.
  • Perform routine tasks at fixed intervals (e.g., real-time clocks, periodic sampling).

These capabilities are especially important in real-time systems and multitasking environments such as RTOS-based applications.

3️⃣ Interrupt Masking and Prioritization

  • Masking: Not all interrupts are needed at all times. Maskable interrupts can be enabled or disabled via control registers. However, non-maskable interrupts (NMIs) are always active and reserved for critical system events.

  • Priority: When multiple interrupts occur, the one with the highest priority is serviced first. This ensures deterministic behavior in complex systems.

Exceptions

4️⃣ Process to Enable and Use an Interrupt

  • Enable the Interrupt in the peripheral control register. (Ex. USART2->CR1)

  • Call CMSIS function NVIC_EnableIRQ(PerX_IRQn) using the corresponding PerX_IRQn.

  • Code the ISR using the corresponding PerX_IRQHandler

  • Intert the code in the ISR. Remember to:

    • Clear the flag in the status register

    • Clear the pending IRQ using the CMSIS function call NVIC_ClearPendingIRQ(PerX_IRQn)

    • Keep the code inside the ISR as brief as possible

5️⃣ Locating the Interrupt Vector Table and IRQn Definitions

To correctly implement an Interrupt Service Routine (ISR) and enable it using CMSIS calls, you need to understand two key components:

1. 🧩Interrupt Vector Table

  • The interrupt vector table maps each interrupt source to its corresponding handler function.

  • On STM32 devices, this table is defined in the startup file (usually stm32g031xx_Vectors.s or similar) and includes entries like:

DCD     USART2_IRQHandler   ; USART2 global interrupt

Where to find it

  • File: stm32g031xx_Vectors.s

  • Location: Typically in the System Files of your SEGGER Embedded Studio project.

  • Purpose: This file defines the default handlers and links them to the actual ISR functions you write in main.c or another source file

Interrupt Vectors

2. 🧩IRQn Definitions for CMSIS

To enable or configure interrupts using CMSIS functions like NVIC_EnableIRQ(), you need the correct IRQn enumeration.

  • ✅ Example:

      NVIC_EnableIRQ(USART2_IRQn);

Where to find it

Here, is an enum defined in the device header file.

  • File: stm32g031xx.h. One easy way to access it from Segger ES is, if included in main.c, write click on it and select: Go to definition.

  • Location: In the project folder Under STM32G0xx/Device/Include/

  • Section: Look for the IRQn_Type enum, which includes entries like:

      USART2_IRQn = 28, /*!< USART2 global interrupt */

  • This enum is used by CMSIS functions to identify and manage interrupts.

IRQn

6️⃣ CMSIS NVIC (Nested Vectored Interrupt Controller) Intrinsic Functions

  • Software uses the CPSIEi and CPSIDi instructions (asm) to enable and disable interrupts.

  • The CMSIS provides the following intrinsic functions for these instructions:

    void __disable_irq(void) // Disable interrupts
    void __enable_irq(void) // Enable interrupts, by default enabled

In addition, the CMSIS provides a number of functions for NVIC control, including:

intrinsics