Lab #2: Signal Reconstruction using ADC, DAC, and PWM

📚 LAB 2 CMPE2250: Signal Reconstruction using ADC, DAC, and PWM

📋 Objective

  • The purpose of this lab is to capture an analog signal on the STM32’s AN0 (A-to-D channel 0) and simultaneously reconstruct it using two different methods: direct digital-to-analog conversion (DAC) and Pulse Width Modulation (PWM). Finally, you will apply filters to observe how these discrete and modulated signals can be smoothed back into the original analog input.

1️⃣ System Overview

  • Below is the data flow for this lab. The ADC continuously samples the input. Upon completing a conversion, the 12-bit value is passed directly to the DAC, and simultaneously mapped to a Timer’s Capture/Compare Register (CCR) to adjust the PWM duty cycle.
flowchart LR
    A[AD2 Waveform Gen] -->|Analog Sine| B(STM32 ADC: AN0)
    B -->|12-bit Data| C{ISR / DMA}
    C -->|12-bit Data| D(STM32 DAC)
    C -->|Scaled Data| E(STM32 PWM Timer)
    D -->|Discrete Steps| F[AD2 Scope CH1]
    E -->|Modulated Pulse| G[AD2 Scope CH2]

2️⃣ Part 1: The ADC and DAC (Direct Playback)

Because both the ADC and the DAC on the STM32 are 12-bit peripherals (operating from 0 to 4095), the data translation is a direct 1:1 mapping.

  • Initialization: Configure the ADC to sample a signal on channel 0 (AN0) and continuously perform conversions. Trigger an interrupt (or use DMA) every time a conversion is ready.

  • Configure the DAC to output on its primary channel.

  • The Playback Loop: Inside your ISR or DMA callback, read the 12-bit value from the ADC data register and write it directly into the DAC data register.

  • Signal Generation: Connect the AD2 function generator to AN0 and set it to generate a 200[Hz] sinewave (3Vp-p, 1.5V offset). Connect CH1 of the oscilloscope to AN0 to verify the input.

  • Observation: Connect CH2 of the oscilloscope to the DAC output pin. Take a screenshot showing both the smooth input on CH1 and the output on CH2. Add measurements for the frequency and Peak-to-Peak values of both channels.

  • Increase the function generator frequency to 1[KHz]. Observe the output on CH2. Can you observe any difference? Explain and estimate how much higher frequency could the input signal be before the DAC output starts to significantly deviate from the input.

3️⃣ Part 2: Modulating Back via PWM

Now, we will represent the same captured analog signal using a digital pulse.

  • Timer Configuration: Configure a Timer to output a PWM signal on one of its channels. Do not use any prescaler (PSC=0).

  • Set the Auto-Reload Register (ARR) to establish a base PWM frequency high enough to be able to modulate the signal. Calculate what your ARR value should be based on your specific APB timer clock frequency, and verify this base frequency with the AD2.

  • Duty Cycle Mapping: Update the PWM duty cycle every time the program retrieves a new ADC value. Since the ADC outputs a value between 0 and 4095, and your timer counts up to ARR, you must scale the ADC reading to fit the timer’s range. Use the following formula to calculate the new Capture/Compare Register (CCRx​) value:

\[CCR_x = \frac{ADC_{value} \times ARR}{4095}\]
  • Observation: Add the CH2 probe of the oscilloscope to your PWM output pin. You should see a dense square wave where the width of the “high” pulses expands and contracts following the sine wave shape of the input. Take a screenshot.

4️⃣ Part 3: Filtering and Analysis

  • On the AD2, apply a Butterworth Low Pass Filter to the PWM signal. Set it to an 8th order with a cut-off frequency of roughly 2[kHz]. Display the resulting Math channel.

  • Apply a similar low-pass filter to the “steppy” DAC output to convert it into a clean sine wave. Can you figure out the minimum filter order and an acceptable cut-off frequency to make the DAC signal look identical to the input?

  • Take a final screenshot showing the filtered PWM and filtered DAC signals overlaid with the original input.

  • Make comments and conclusions in your Panopto submission.

5️⃣ Challenge (Optional)

  • Modify your program to generate a second, inverted signal. Output the original signal on DAC Channel 1, and apply a 180∘ phase shift to the data before sending it out on DAC Channel 2. Hint: How can you mathematically invert a 12-bit number range? Take a screenshot of the two mirrored signals.